题解 | #状态机-重叠序列检测#
状态机-重叠序列检测
https://www.nowcoder.com/practice/10be91c03f5a412cb26f67dbd24020a9
重叠的话直接移位寄存，寄存后的数据与序列数做对比，相等则flag为1，不等则为0，两个always正好延迟两拍
`timescale 1ns/1ns
module sequence_test2(
input wire clk ,
input wire rst ,
input wire data ,
output reg flag
);
//*************code***********//
reg [3:0] data_r;
always@(posedge clk or negedge rst)
if(!rst)
data_r <= 4'd0;
else
data_r <= {data_r[2:0],data};
always@(posedge clk or negedge rst)
if(!rst)
flag <= 1'b0;
else if(data_r[3:0] == 4'b1011)
flag <= 1'b1;
else
flag <= 1'b0;
//*************code***********//
endmodule
