题解 | #编写乘法器求解算法表达式#

`timescale 1ns/1ns

module mul(
	input [3:0] a,
	input [3:0] b,
	output [7:0] result
);
	genvar i;
	wire [7:0] c [0:3]; 
	generate
		for(i = 0; i <= 3; i = i + 1) begin
			 assign c[i] = b[i] ? a<<i : 0;
		end
	endgenerate

	assign result = c[0] + c[1] + c[2] + c[3];

endmodule

module calculation(
	input clk,
	input rst_n,
	input [3:0] a,
	input [3:0] b,
	output [8:0] c
	);

	reg [8:0] c_reg;
	wire [7:0] temp0,temp1;
	mul mul0(.a(12),.b(a),.result(temp0));
	mul mul1(.a(5),.b(b),.result(temp1));

	always @(posedge clk or negedge rst_n) begin
		if(~rst_n) begin
			c_reg <= 0;
		end
		else begin
			c_reg = temp0 + temp1;
		end
	end
	assign c = c_reg;
endmodule

乘法器采用单周期完成，比较简单。