题解 | 任意奇数倍时钟分频

`timescale 1ns/1ns

module clk_divider
    #(parameter dividor = 5)
( 	input clk_in,
	input rst_n,
	output clk_out
);
//占空比50%，奇数倍分频 --> 上升沿上升，dividor/2个时钟周期后，下降沿下降
reg pos_flag,neg_flag;
reg [$clog2(dividor-1):0] cnt;
always@(posedge clk_in or negedge rst_n)
if(!rst_n)
  cnt <= 0;
else
  cnt <= (cnt==dividor-1) ? 0 : (cnt + 1'b1);

always@(posedge clk_in or negedge rst_n)
if(!rst_n)
  pos_flag <= 0;
else if(cnt==(dividor-1)>>1)
  pos_flag <= ~pos_flag;
else if(cnt==dividor-1)
  pos_flag <= ~pos_flag;
else
  pos_flag <= pos_flag;
 

always@(negedge clk_in or negedge rst_n)
if(!rst_n)
  neg_flag <= 0;
else if(cnt==(dividor-1)>>1)
  neg_flag <= ~neg_flag;
else if(cnt==dividor-1)
  neg_flag <= ~neg_flag;
else
  neg_flag <= neg_flag;

assign clk_out = pos_flag || neg_flag;



endmodule

借用一个友友的图