题解 | 移位运算与乘法

`timescale 1ns/1ns
module multi_sel(
input [7:0]d ,
input clk,
input rst,
output reg input_grant,
output reg [10:0]out
);
//*************code***********//
reg [2:0] state;
reg [7:0] d_reg;
// always@(posedge clk or negedge rst)
// if(!rst)
//   current_state <= 3'd0;
// else
//   current_state <= next_state;用这个的话两拍才换一个状态，太慢了，结果报错。

always@(posedge clk or negedge rst)
if(!rst) begin
    input_grant <= 0;
    out <= 0;
    d_reg <= 0;
    state <= 3'd0;//改成一个state，一拍就换状态，快一点
end
else begin
    case(state)
    3'd0: begin
        input_grant <= 1;
        d_reg <= d;
        out <= d;
        state <= 3'd1;
    end
    3'd1:begin
        input_grant <= 0;
        out <= (d_reg << 1) + d_reg;
        state <= 3'd2;
    end
    3'd2:begin
        input_grant <= 0;
        out <= (d_reg << 3) - d_reg;
        state <= 3'd3;
    end
    3'd3:begin
        input_grant <= 0;
        out <= (d_reg << 3);
        state <= 3'd0;
    end
    default:begin
        input_grant <= 0;
        d_reg <= 0;
        out <= 0;
        state <= 3'd0;
    end
    endcase
end

//*************code***********//
endmodule