题解 | #ROM的简单实现#
ROM的简单实现
http://www.nowcoder.com/practice/b76fdef7ffa747909b0ea46e0d13738a
`timescale 1ns/1ns
module rom(
input clk,
input rst_n,
input [7:0]addr,
output [3:0]data
);
wire [3:0] rom [7:0];
genvar i;
generate
for(i=0;i<8;i=i+1)
assign rom[i] = 2*i;
endgenerate
assign data = rom[addr];
endmodule
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